1. Field of the Invention
The present invention relates to a liquid-crystal display and its drive circuit and, more particularly, to a liquid-crystal display and a drive circuit suitable for a polycrystalline silicon liquid-crystal display (LCD) in which drive circuits are integrated over a wide area on a glass substrate.
2. Description of the Related Art
The present invention relates to a drive circuit for applying a voltage to liquid-crystal cells or to a data driver (which may be referred to as an address driver). Herein, a liquid-crystal display employing thin-film transistors (TFTs) will be used as an example. However, the present invention is not limited to this type of liquid-crystal display but can be applied to a data driver in any other type of liquid-crystal display.
According to a prior art, in a liquid-crystal display, cell electrodes and bus electrodes are formed on a glass substrate. A drive circuit is formed on an IC chip, and the IC chip is affixed to the glass substrate. Electrode pads on the IC chip and electrode pads on the glass substrate are linked by bonding wires. In this case, since a drive circuit is formed on a monocrystalline silicon substrate, complex circuitry can be designed. The liquid-crystal display of the prior art therefore includes two-stage of sample-and-hold circuits. While the first stages of sample-and-hold circuits are sampling display data, the second stages of sample-and-hold circuits provide outputs to be written. Data can therefore be written over nearly the whole display data hold period, and a driver of low driving ability can be used.
However, when an IC chip is affixed to a glass substrate and bonding wires are used for making electrical connections, it is difficult to attain sufficient productivity. This poses the problem of an increase in cost. For avoiding this kind of problem, a liquid-crystal display (LCD) using no IC chip such as a poly-crystalline silicon LCD in which a poly-crystalline silicon is used to form circuits directly in a wide area on a glass substrate has been devised. However, the poly-crystalline silicon LCD has a problem that it is more difficult to increase the density of devices to be integrated and stabilize the characteristics of the devices than it is when an IC chip is used. A data driver referred to as a point-sequential driving type data driver, using no sample-and-hold circuits, is employed.
A circuit employing a source-follower amplifier is widely used as a driver because of its simple circuitry. A buffer using a source-follower amplifier outputs a voltage produced by subtracting the threshold voltage of a transistor from an input voltage through the source-follower amplifier. However, there is a problem that the output voltage of the buffer is susceptible to the variation in the characteristic of a device, and changes along with the variation the characteristic. The same applies to a buffer using an operational amplifier. When a gradation level (voltage) must be written, there arises a problem that since an output voltage changes due to the variation in the characteristic of a device, irregular display occurs and display quality deteriorates.
Moreover, the buffer using an operational amplifier has another problem in that the circuitry is so complex as to increase the size of a driver.
The two problems are common to drive circuits for liquid-crystal displays. In particularly, for the poly-crystalline silicon LCD in which drive circuits are integrated over a wide area on a glass substrate, the problems are so critical as to dominate the possibility of attaining a larger screen or higher definition. There is therefore an increasing demand for a compact buffer not susceptible to the characteristics of a device and having simple circuitry.
Moreover, the point-sequential driving type data driver has the merits of having very simple circuitry and of minimizing a decrease in yield, and is therefore widely used for a poly-crystalline silicon LCD, used as a compact panel of up to 2 inches wide, for a projector. However, according to point-sequential driving method, a time interval usable for one writing is as short as several tens to several hundreds of nanoseconds. The data driver must apply a voltage representing data to a data bus for the short time interval. When the data driver is employed in a compact panel for a projector or the lake which is conformable to the Video Graphics Array (VGA) standard (640 by 480 pixels) stipulating a relatively low resolution, the capacitance of the data bus is very small and a time constant dependent on the capacitance and resistance of the data bus is very small. Therefore, display data Vdata can be input in a parallel form and the size of an analog switch can be optimized. However, when the data driver is employed in a direct-vision panel to be mounted in a notebook-sized personal computer and having a width of 10 inches or more, the area of a data bus is large. Therefore, the capacitance of the data bus is large, and the time constant is large. Consequently, the point-sequential driving type data driver fails to drive a data bus. Even if the data driver can drive a data bus, there arises a problem that the circuitry required will become unfeasibly large. When an attempt is made to realize a higher resolution, the crossings of wirings will increase. This poses a problem that the point-sequential driving fails to cope with the complex wirings.
As mentioned above, the point-sequential driving type data driver has its limitations in terms of a screen size and resolution. However, as far as the poly-crystalline silicon LCD is concerned, another driving method is unavailable. The foregoing problems are therefore critical problems dominating the possibility of realizing a larger screen or higher definition. There is therefore an increasing demand for a driving method making it possible to ensure a long writing time during which a voltage representing data is applied to a data bus despite small circuitry, and a drive circuit in which the driving method is implemented.
The first object of the present invention is to realize a buffer which is not susceptible to the characteristics of a device and having compact and simple circuitry. The second object of the present invention is to realize a driving method requiring little circuitry and making it possible to ensure a long writing time during which a voltage representing data is applied to a data bus, and a drive circuit in which the driving method can be implemented.
For accomplishing the first object, according to the first aspect of the present invention, a drive circuit for liquid-crystal displays includes an auxiliary capacitor. A first voltage is applied to a driving buffer, an output voltage of the buffer is temporarily accumulated in the auxiliary capacitor. A voltage produced by subtracting the voltage at the auxiliary capacitor from a second voltage is applied to the driving buffer, and an output of the driving buffer is applied to a data bus. Consequently, the threshold voltage of a transistor included in the driving buffer is canceled out by the output. A difference between the second voltage and first voltage is applied to the data bus, that is, a sampled capacitor. Thus, the output voltage is not susceptible to the uncertainty in the characteristic of a transistor.
To be more specific, according to the first aspect of the present invention, the drive circuit for liquid-crystal displays is a drive circuit for applying a voltage to display cells in a liquid-crystal display, and comprises a driving buffer for outputting a drive voltage to be applied to a display cell, a holding capacitor, and a switching circuit for switching a first state in which a first input voltage is applied to an input terminal of the driving buffer, a first terminal of the holding capacitor is connected to an output terminal of the driving buffer, and a second terminal of the holding capacitor is connected to a terminal at which a first given voltage exists, and a second state in which a second input voltage is applied to the first terminal of the holding capacitor, the input terminal of the driving buffer is connected to the second terminal of the holding capacitor, and a drive voltage is applied to a display cell through the output terminal of the driving buffer.
When the foregoing drive circuit is used to construct a data driver in a point-sequential driving type liquid-crystal display, display data is input as the first voltage, and a given voltage is input as the second input voltage. The switching circuit selects the first state during a display data hold period, and selects the second state during part or the whole of a horizontal retrace period.
Moreover, when sample-and-hold circuits for successively sampling display data are included in the data driver, an output of a sample-and-hold circuit is input as the first input voltage of the drive circuit, and the given voltage is input as the second input voltage. During part or the whole of the horizontal retrace period, the first state is selected. During the other periods, the second state is selected. In a variant, the drive circuit has the capability of a sample-and-hold circuit. A drive circuit to which an output of a sample-and-hold drive circuit is input is operated as a second drive circuit. The drive circuit having the capability of a sample-and-hold circuit inputs display data as the first input voltage, and inputs the given voltage as the second voltage. The switching circuit selects the first state during a display data hold period, and selects the second state during part or the whole of the horizontal retrace period. The second drive circuit inputs an output of the drive circuit having the capability of a sample-and-hold circuit as the first input voltage, and inputs the given voltage as the second input voltage. The switching circuit may select the first state during part or the whole of the horizontal retrace period, and select the second state during the other periods. On the contrary, an output of a sample-and-hold circuit may be input as the second input voltage and the given voltage may be input as the first input voltage. Even in this case, the threshold voltage of a transistor is canceled. The output voltage is therefore not susceptible to a uncertainty of the characteristic of a transistor.
It is well known that a voltage to be applied to a liquid crystal is reversed in polarity at intervals of a frame in an effort to prevent polarization of the liquid crystal. The present invention can be applied to this system. In this case, a positive voltage application period during which a positive voltage is applied to display cells and a negative voltage application period during which a negative voltage is applied are switched for each display frame. A gradation voltage representing a gradation level that is indicated by display data according to brightness of display is reversed in polarity between the positive voltage application period and negative voltage application period. Preferably, the magnitude of variation of the voltage is equalized between the positive voltage application period and negative voltage application period, and the second input voltage is made different between the positive voltage application period and negative voltage application period.
Moreover, display data may be a digital signal. In this case, latches for successively latching display data and D/A converters each converting an output of an associated latch into an analog signal are included. An output of a D/A converter is input as display data to the drive circuit.
For accomplishing the second object, according to the second aspect of the present invention, data buses in a liquid-crystal display are grouped into a plurality of blocks, and a data driver is segmented into a plurality of blocks accordingly. Each block includes a sample-and-hold circuit, a drive circuit, and a switch for isolating an output of the drive circuit from the data bus. Sample-and-hold and output can therefore be controlled block by block. Sample-and-hold and output are carried out at different time instants among the blocks. Each block can therefore hold display data until sampling is restarted after sampling is completed. When a scan pulse is output in the meantime, writing can be carried out. The timing of outputting a scan pulse is shifted so that the pulse duration of the scan pulse will substantially coincide with the display data hold periods used by the first block and last block. Writing is carried out during the coincident time interval. Consequently, a writing period can be extended even when only one set of sample-and-hold stages is employed. The writing period can be extended up to a sum of a half of a display data hold period and a horizontal retrace period.
To be more specific, according to the second aspect of the present invention, a liquid-crystal display is a liquid-crystal display having a display cell array in which a plurality of display cells are set in array, a scan driver for outputting a scan signal, and a data driver for outputting a drive voltage to be applied to the display cells. The data driver includes sample-and-hold circuits for successively sampling display data, a drive circuit segmented into a plurality of display blocks and allowing each display block to apply a voltage to a load including a display cell according to an output of an associated sample-and-hold circuit, and switches each isolating an output of a display block of the drive circuit from a load. During a period during which the scan driver outputs the scan signal, each display block applies the drive voltage to a load for a given period.
When the scan pulse is output with a delay of a half of the pulse duration of a signal representing display data after input of the display data, a writing period can be maximized.
Moreover, the scan driver may be installed on the right-hand and left-hand sides of the display cell array, and a plurality of scan blocks may be defined. The present invention can be adapted to this configuration. In this case, the timing of outputting a scan pulse is shifted scan block by scan block. This results in a longer writing period. For example, when the number of scan blocks is p, a scan pulse is preferably output to a q-th scan block with a delay of (2(qxe2x88x921)+1)/2p of the pulse duration of a signal representing display data after input of the display data.
Moreover, writing may be started during sampling. Therefore, a longer writing period can be ensured for display data sampled earlier by the same block. In this case, when sampling of display data has not been completed, display data concerning the preceding line is written. However, since the correct display data is sampled for a short period of time during which writing is not completed, no problem will occur.
Moreover, the rise time and the fall time of a scan pulse generally remain constant. However, the rise time may be delayed and the fall time may be advanced, whereby a selection period will get shorter.
Furthermore, for realizing the second object, according to the third aspect of the present invention, a drive circuit for liquid-crystal displays comprises a reference value generating circuit for generating a reference value that varies at intervals of a given cycle, a comparing circuit for comparing sampled display data with the reference value, a drive voltage generating circuit for generating a drive voltage that varies at intervals of a given cycle, and a switching circuit for controlling application of a drive voltage according to the result of comparison. The other circuits, including a sampling circuit, are separated from the drive voltage generating circuit and the switching circuit that require a high-grade driving ability, whereby the other circuits that are complex are reduced in size. This results in a compact drive circuit.
Specifically, according to the third aspect of the present invention, the drive circuit for liquid-crystal displays is a drive circuit for applying a voltage to display cells in a liquid-crystal display. The drive circuit comprises a sampling circuit for sampling and holding display data, a reference signal generating circuit for generating a reference signal that varies at intervals of a given cycle, a comparing circuit for comparing an output of the sampling circuit with a reference voltage and outputting a result of comparison, a drive voltage generating circuit for generating a drive voltage that varies at intervals of a given cycle, and a switch to be made to apply the drive voltage to an output terminal according to the output of the comparing circuit.
When the display data and the reference signal are analog signals, the sampling circuit includes an analog switch for sampling and a holding capacitor for sampling. The comparing circuit includes a sampling circuit for comparison composed of an analog switch for comparison and a holding capacitor for comparison, and a logic circuit. A reference signal is supplied, as a reference potential at the holding capacitor, for comparison. After the sampling circuit for comparison samples display data, the reference signal is varied. For example, the logic circuit in the comparing circuit is formed with an inverter, and the sampling circuit includes an analog buffer formed with a source-follower amplifier on the output stage.
During an initialization period preceding sampling of display data, the analog switch is made so that a given initialization voltage will be accumulated in the holding capacitor for sampling. Assuming that the threshold voltage of the logic circuit in the comparing circuit is Vtinv and a range of values in which the threshold voltage is uncertain in the course of manufacturing is xcex94Vtinv, an amplitude of display data representing one gradation level and an amplitude of the reference signal representing one gradation level must be equal to or larger than the range xcex94Vtinv.
Moreover, for compensating for the uncertainty of the threshold voltage of the comparing circuit, a holding capacitor for correction, and a switching circuit for switching a first state in which the holding capacitor for correction is connected between an output terminal of the switch and a terminal at which a first given voltage exists and a second state in which the holding capacitor is connected between the sampling circuit and comparing circuit. In the first state, the reference signal generating circuit outputs a reference signal that varies within the range of values in which the threshold voltage of the logic circuit included in the comparing circuit varies. The drive signal generating circuit outputs a signal that varies with the same amplitude as the reference signal, with an arbitrary voltage as a center, synchronously with the reference signal. In the second state, the reference signal generating circuit outputs a signal produced by adding the arbitrary voltage to the reference signal. The drive signal generating circuit outputs a drive signal. Preferably, within one horizontal synchronization period, after display data is sampled, the first state is established, and thereafter, the second state is established.
When the display data is a digital signal, the sampling circuit is a digital latch, and the comparing circuit is a digital comparing circuit. The reference signal generating circuit is a counter for generating a reference signal as a reference value. The digital comparing circuit is realized with a larger value judging circuit for judging which of display data and reference value is larger, or a consistency detecting circuit for judging whether or not the display data and reference value are mutually consistent. The digital latch is set or reset with an output of the larger value judging circuit or the consistency detecting circuit.
Moreover, the sampling circuit may be realized with a digital latch. The comparing circuit may be realized with a counter capable of being initialized, and accepts the reference signal as a counter operation control signal. After display data is set as an initial count value, counting may be carried out and a carry signal or a borrow signal may be output as a result of comparison.
In a liquid-crystal display in which the drive circuit in accordance with the third aspect of the present invention is used to construct a data driver and a voltage to be applied to a liquid crystal is reversed in polarity at intervals of a frame, a positive voltage application period during which a positive voltage is applied to display cells and a negative voltage application period during which a negative voltage is applied are switched for each display frame. A drive voltage is a signal symmetrical relative to a center level during both the positive voltage application period and negative voltage application period.
Moreover, the drive voltage may be varied non-linearly.